فلكس‌راي

فلكس‌راي FlexRay هو پروتوكول الاتصالات الشبكية للسيارة طوّره كونسورتيوم فلكس راي، ليحكم كل الحوسبة على حواسب أنظمة السيارة. يتمتع نظام توصيل فليكس راي بتدفق عالي يصل إلى 10 ميگابت في الثانية بالإضافة إلى تحصينه ضد الأخطاء. وكانت أول سيارة تعتمد على هذا التوصيل سيارة بي أم في إكس 5.

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الكونسورتيوم

شارك العديد من الشركات في اتحاد فلكس‌راي، وعمل على تطويره. ومن أهم هذه الشركات:

الكونسورتيوم انحل في 2009، ولكن معايير فلكس‌راي هي الآن جزء من معايير ISO، 17458-1 to 17458-5.[1]


تفاصيل

الساعة

Bits on the bus

0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0

Correct averaging in case of no errors. The signal is merely delayed by 2 cycles.

0 0 0 0 0 0 1 1 1 1 0 1 1 1 0 0 0 0
0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0

Errors near the middle of 8-cycle region are canceled.

0 0 0 1 0 1 1 1 1 1 1 1 1 0 0 0 0
0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0

Errors near the boundary of 8-cycle region may affect the boundary bit.

At each time, only one ECU writes to the bus. Each bit to be sent is held on the bus for 8 sample clock cycles. The receiver keeps a buffer of the last 5 samples, and uses the majority of the last 5 samples as the input signal.

Single-cycle transmission errors may affect results near the boundary of the bits, but will not affect cycles in the middle of the 8-cycle region.

Sampled bits

The value of the bit is sampled in the middle of the 8-bit region. The errors are moved to the extreme cycles, and the clock is synchronized frequently enough for the drift to be small. (Drift is smaller than 1 cycle per 300 cycles, and during transmission the clock is synchronized more than once every 300 cycles).

Frame

All the communication is sent in the form of frames. The message consists of bytes , packed in the following way:

  • Transmission Start Signal (TSS) – bit 0
  • Frame Start Signal (FSS) – bit 1
  • m times:
    • Byte Start Signal 0 (BSS0) – bit 1
    • Byte Start Signal 1 (BSS1) – bit 0
    • 0th bit of i-th byte
    • 1st bit of i-th byte
    • 2nd bit of i-th byte
    • ...
    • 7th bit of i-th byte
  • Frame End Signal (FES) – bit 0
  • Transmission End Signal (TES) – bit 1

If nothing is being communicated, the bus is held in state 1 (high voltage), so every receiver knows that the communication started when the voltage drops to 0.

The receiver knows when the message is complete by checking whether BSS0 (1) or FES (0) was received.

Note that 8-cycle per bit has nothing to do with bytes. Each byte takes 80 cycles to transfer. 16 for BSS0 and BSS1 and 64 for its bits. Also note that BSS0 has value 1, and BSS1 has value 0.

تزامن الساعة

Clocks are resynchronized when the voted signal changes from 1 to 0, if the receiver was in either idle state or expecting BSS1.

The green cells are sampling points. All except the first are synchronized by the 1->0 edge in the transmission fragment shown.

Signal to be sent 1 0 1 0 1
Signal sent 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1
On the bus 1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 1 0 1 1
Received 1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 1 1 1 1 1 1 X 1 0 0 0 0 0 0 1 0 1 1
5-maj voted 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 1 1 1 1 1 1 X 1 0 0 0 0 0 0 1 0 1 1

انظر أيضاً

المراجع

  1. ^ Lorenz, Steffen (2010). "The FlexRay Electrical Physical Layer Evolution" (PDF). Automotive 2010. Archived from the original (PDF) on 16 February 2015. Retrieved 16 February 2015.

وصلات خارجية


قالب:Automation protocols